Entry-level Physical Design Engineer
This is a fantastic opportunity to work with a small team of experienced physical designers and creative processor architects to build an ARM manycore SoC! Mellanox's Bluefield team in Westborough, MA, USA is hiring talented, enthusiastic VLSI chip designers holding a Bachelor's, Master’s, or PhD in Electrical or Computer Engineering. Get on board to see your design tape out and your silicon ship to key technical markets!
Complex
manycore processor implementation carries many challenges -
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Providing
a high-bandwidth, versatile on-chip fabric
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Specifying
robust clocking and power delivery schemes
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Generating
optimized, reusable block layouts
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Implementing
high-bandwidth memory and I/O solutions
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Incorporating
the latest SOC power-saving, security, debug and DfT features
Our relatively small design team has delivered three generations of complex manycore processors to market. We strive to keep the startup culture alive - relaxed but highly productive! There is a lot to learn and the work is fast- paced. Employees contribute across disciplines on varied tasks and are encouraged to take on responsibilities at any level they can handle. We are truly a team, learning from one another and reviewing one another’s work.
The entry-level Physical Design engineer owns the physical design of block layouts, custom elements, and top-level chip features starting with architecture feasibility through implementation and physical verification. You will be challenged with -
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Mapping
complex processor blocks from specification or RTL to silicon
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Using
industry standard EDA tools for ASIC design such as Synopsys ICC and Cadence
Encounter
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Contributing
to EDA tool methodology for custom design, synthesis, place & route, static
timing analysis, physical verification, and power optimization
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Creating
production-worthy block layouts and special cells using the ASIC flow and/or
custom design techniques
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Applying
knowledge of device and process technology to design problems
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Applying
familiarity with CPU and SOC architecture and I/O protocols and interfaces to
design problems
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Demonstrating
proficiency using scripting languages such as Python, understanding and
modifying Verilog, and development best practices